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lc86p5420 no.6730-1/22 sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan lc86p5420 13001 rm (im) fs any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. cmos ic ver. 2.00 31395 8-bit single chip microcontroller with the one-time programmable prom preliminary ordering number : enn*6730 overview the lc86p5420 is a cmos 8-bit single chip microcontroller with one-time prom for the lc865500 / lc865400 series. this microcontroller has the function and the pin description of the lc865500 / lc865400 series mask rom version, and the 20k-byte prom. features (1) option switching by prom data the option function of the lc865400 series can be specified by the prom data. the lc86p5420 can be checked the functions of the trial pieces using the mass production board. (2) internal one-time prom capacity : 20736 bytes (3) internal ram capacity : 512 bytes mask rom version prom capacity ram capacity lc865520 20480 bytes 512 bytes lc865516 16384 bytes 512 bytes lc865512 12288 bytes 512 bytes LC865508 8192 bytes 512 bytes lc865504 4096 bytes 512 bytes lc865412 12288 bytes 224 bytes lc865408 8192 bytes 224 bytes lc865404 4096 bytes 224 bytes (4) operating supply voltage : 4.5v to 6.0v (5) instruction cycle time : 1.0 m s to 366 m s (6) operating temperature : -30 c to +70 c (7) the pin and the package compatible with the lc865400 series mask rom devices (8) applicable mask rom version : lc865520 / lc865516 / lc865512 / LC865508 / lc865504 lc865412 / lc865408 / lc865404 (9) factory shipment : dip42s, qfp48e
lc86p5420 no.6730-2/22 notice for use the lc86p5420 is provided for the first release and small shipping of the lc865500 / lc865400 series. at using, take notice of the followings. (1) a point of difference the lc86p5420 and the lc865500 / lc865400 series item lc86p5420 lc865520 / 16 / 12 / 08 / 04 lc865412 / 08 / 04 operation after reset the option is specified by degrees the program is executed from 00h of the releasing until 3ms after going to a 'h' level program counter immediately after going to the reset terminal. the program to a 'h' level to the reset terminal. is executed from 00h of the program counter. operating supply 4.5v to 6.0v 2.5v to 6.0v voltage range (v dd ) power dissipation refer to 'electrical characteristics' on the semiconductor news. the lc86p5420 functions same as the followings while resetting ; lc865520 / 16 / 12 / 08 / 04, lc865412 / 08 / 04. the lc86p5420 uses 256 bytes that is addressed on 7f00h to 7fffh in the program memory as the option configulation data area. ?a kind of the option corresopnding of the lc86p5420 a kind of option pins, circuits contents of the option input / output form of port 0 1. n-channel open drain output input / output ports 2. cmos output *1 1. pull-up mos tr. provided 2. pull-up mos tr. not provided *2 port 1 1. input : programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. *1 output : cmos port 3 1. input : no programmable pull-up mos tr. output : n-channel open drain 2. input : programmable pull-up mos tr. *1 output : cmos *1) specified in bit *2) specified in nibble unit. pull-up mos tr. is not provided in n-channel open drain output port. (2) option the option data is created by the option specified program "su86k.exe". the created option data is linked to the program area by the linkage loader "l86k.exe".
lc86p5420 no.6730-3/22 (3) rom space the lc86p5420 and lc865500 / lc865400 series use 256 bytes that is addressed on 7f00h to 7fffh in the program memory as the option specified data area. these program memory capacity are 20480 bytes that is addressed on 0000h to 4fffh. (4) ordering information 1. when ordering the identical mask rom and prom devices simultaneously. provide an eprom containing the target memory contents together with the separate order forms for each of the mask rom and prom versions. 2. when ordering a prom device. provide an eprom containing the target memory contents together with an order form. how to use (1) create a programming data for lc86p5420 programming data for eprom of the lc86p5420 is required. debugged evaluation file (eva file) must be converted to an intel-hex formatted file (hex file) with file converter program, eva2hex.exe. the hex file is used as the programming data for the lc86p5420. (2) how to program for the eprom the lc86p5420 can be programmed by the eprom programmer with attachment ; w86ep5420d, w86ep5420q. ? recommended eprom programmer productor eprom programmer advantest r4945, r4944, r4943 andou af-9704 aval pkw-1100, pkw-3000 minato electronics model1890a ? "27512 (vpp=12.5v) intel high speed programming" mode available. the address must be set to "0000h to 7fffh" and a jumper (dasec) must be set to 'off' at programming. lc865520 6fffh 7fffh 7f00h 5fffh 4fffh 3fffh 2fffh 1fffh 0fffh 0000h option data area 256 bytes program area 20k bytes lc865516 option data area option data area option data area option data area program area 16k bytes lc865512 lc865412 program area 12k bytes LC865508 lc865408 program area 08k bytes lc865504 lc865404 program area 04k bytes
lc86p5420 no.6730-4/22 w86ep5420d w86ep5420q (3) how to use the data security function "data security" is the disabled function to read the data of the eprom. the following is the process in order to execute the data security. 1. set 'on' the jumper of attachment. 2. program again. then the eprom programmer displays the error. the error means normally activity of the data security. it is not a trouble of the eprom programmer or the lsi. notes ? data security is not executed when the data of all address have 'ffh' at the sequence 2 above. ? the programming by a sequential operation "blank=>program=>verify" cannot be executed data security at the sequence 2 above. ? set 'off' to the jumper after executing the data security. data security not data security data security not data security
lc86p5420 no.6730-5/22 pin assignment ? dip42s package dimension (unit : mm) 3025b sanyo : dip-42s(600mil) 1.15 0.51min 3.8 4.25 0.25 5.1max 1.78 0.48 0.95 37.9 15.24 13.8 1 42 21 22 ilc00019 p17/pwm0 p16/buz p15/sck1 p14/s11/sb1 p13/so1 p12/sck0 p11/si0/sb0 p10/so0 p36 p35 p34 p33 p32 p31 p30 p73/int3/t0in p72/int2/t0in p71/int1 p87/an7 p86/an6 p85/an5 p00 p01 p02 p03 p04 p05 p06 p07 p70/int0 xt2/p75 v ss cf1 cf2 v dd p80/an0 p81/an1 p82/an2 p83/an3 p84/an4 xt1/p74 res 1 3 5 2 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 26 25 27 29 28 30 31 32 33 34 35 36 37 38 39 40 41 42
lc86p5420 no.6730-6/22 sanyo : qip-48e 14.0 17.2 1.5 1.5 1.6 0.15 0.35 0.1 15.6 0.8 1.0 3.0max 1 48 12 13 24 25 36 37 2.7 14.0 17.2 1.5 1.5 1.6 1.0 pin assignment ?qfp48e package dimension (unit : mm) 3156 ilc00020 24 23 22 21 20 19 18 17 16 15 14 13 37 38 39 40 41 42 43 44 45 46 47 48 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 nc p72 / int2 / t0in p71 / int1 p87 / an7 p86 / an6 p85 / an5 nc p84 / an4 p83 / an3 p82 / an2 p81 / an1 p80 / an0 p12 / sck0 p11 / si0 / sb0 p10 / so0 p36 p35 p34 p33 nc p32 p31 p30 p73 / int3 / t0in p13 / so1 p14 / si1 / sb1 p15 / sck1 p16 / buz p17 / pwm0 nc p00 p01 p02 p03 p04 nc p05 p06 p07 p70 / int0 nc xt2 / p75 v ss cf1 cf2 v dd res xt1 / p74 *nc pin must not connect to anything.
lc86p5420 no.6730-7/22 interrupt control stand-by control cf x'tal rc clock generator port 1 port 3 eprom(20kb) b register c register alu ir pla eprom control psw rar ram port 7 port 8 stack pointer port 0 watchdog timer base timer sio0 sio1 timer 0 adc timer 1 int0 to 3 noise filter pc acc bus interface ilc00035 a14--a0 d7--d0 ta ce oe dasec system block diagram
lc86p5420 no.6730-8/22 pin description pin name i / o function description option prom mode v ss power pin (-) v dd power pin (+) port0 i / o ?8-bit input / output port ?pull-up resistor : p00 - p07 input / output in nibble units provided / not provided ?input for port 0 interrupt (specify every 4-bit) ?input for hold release ?output form : ?15v withstand at n-channel open cmos / n-channel open drain drain output (specify in bit) port1 i / o ?8-bit input / output port ?output form : data line p10 - p17 input / output can be specified cmos / n-channel open drain d0 to d7 in bit unit. (specify in bit) ?other pin functions p10 sio0 data output p11 sio0 data input / bus input / output p12 sio0 clock input / output p13 sio1 data output p14 sio1 data input / bus input / output p15 sio1 clock input / output p16 buzzer output p17 timer1 (pwm0) output port3 i / o ?7-bit input / output port ?pull-up resistor : p30 - p36 input / output in bit unit provided / not provided ?15v withstand at n-channel open ?output form : drain output cmos / n-channel open drain port7 ?4-bit input / output port input / output in bit unit ?2-bit input port ?other pin functions p70 - p73 i / o p70 : int0 input / hold release prom control input / n-channel tr. output for signals watchdog timer ?dasec (*1) p74, p75 i p71 : int1 input / hold release input ?oe (*2) p72 : int2 input / timer 0 event input ?ce (*3) p73 : int3 input with noise filter / timer 0 event input p74 : input pin xt1 for 32.768khz crystal oscillation p75 : output pin xt2 for 32.768khz crystal oscillation ?interrupt received form, vector address rising falling rising high low vector & level level falling int0 enable enable disable enable enable 03h int1 enable enable disable enable enable 0bh int2 enable enable enable disable disable 13h int3 enable enable enable disable disable 1bh
lc86p5420 no.6730-9/22 pin name i / o function description option prom mode port8 p80 - p83 i ?4-bit input port ta (*4) p84 - p87 i / o ?4-bit input / output port input / output can be specified in bit unit ?other function ad input port (an7 to an0) res i reset pin xt1 / p74 i ?input pin for the 32.768khz cyrstal oscillation ?other function xt1 : input port p74 in case of non use, connect to v dd xt2 / p75 o ?output pin for the 32.768khz crystal oscillation ?other function xt2 : input port p75 in case of non use, connect to v dd at using as port or unconnect at using as oscillation. cf1 i input pin for the ceramic resonator oscillation cf2 o output pin for the ceramic resonator oscillation n all of port options except the pull-up resistor option of port 0 can be specified in a bit unit. *1 memory select input for data security *2 output enable input *3 chip enable input *4 ta---> prom control signal input
lc86p5420 no.6730-10/22 1. absolute maximum ratings at v ss = 0v and ta=25 c parameter symbol pins conditions ratings v dd [v] min. typ. max. unit supply voltage v dd max v dd v dd -0.3 +7.0 v input voltage vi(1) ?ports 74, 75 -0.3 v dd +0.3 ? ports 80, 81, 82, 83 ?res input / output vio(1) ?port 1 -0.3 vdd+0.3 voltage ?ports 70, 71, 72, 73 ?ports 84, 85, 86, 87 ?ports 0,3 at cmos output option vio(2) ports 0, 3 at n-ch -0.3 15 open drain output option high peak ioph ?ports 0, 1, 3 cmos output -10 ma level output ?ports 71, 72, 73 at each pins output current ? ports 84, 85, 86, 87 current total ? ioah(1) ports 0, 1 the total all -30 output pins current ? ioah(2) port 3 the total all -15 pins ? ioah(3) ?ports 71, 72, 73 the total all -10 ? ports 84, 85, 86, 87 pins low peak iopl(1) ports 0, 1, 3 at each pins 20 level output iopl(2) ? ports 70, 71, 72, 73 at each pins 15 output current ? ports 84, 85, 86, 87 current total ? ioal(1) ports 0, 1, 70 the total all 60 output pins current ? ioal(2) port 3 the total all 40 pins ? ioal(3) ?ports 71, 72, 73 the total all 20 ? ports 84, 85, 86, 87 pins power pd max (1) dip42s ta=-30 to +70 c 630 mw dissipation pd max (2) qfp48e ta=-30 to +70 c 410 (max.) operating topg -30 70 c temperature range storage tstg -65 150 temperature range
lc86p5420 no.6730-11/22 2. recommended operating range at ta= -- 30 c to +70 c, v ss =0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit operating v dd v dd 0.98 m s tcyc 4.5 6.0 v supply tcyc 400 m s voltage range hold voltage vhd v dd rams and 2.0 6.0 registers hold voltage at hold mode. input high vih(1) port 0 at cmos output disable 4.5 to 6.0 0.33v dd v dd voltage output +1.0 vih(2) port 0 at n-ch output disable 4.5 to 6.0 0.75v dd 13.5 open drain output option. vih(3) ?port 1 output disable 4.5 to 6.0 0.75v dd v dd ?ports 72, 73 ?port 3 at cmos output vih(4) port 3 at n-ch output disable 4.5 to 6.0 0.75v dd 13.5 open drain output option. vih(5) ?port 70 output disable 4.5 to 6.0 0.75v dd v dd port input / interrupt ?port 71 ?res vih(6) port 70 output disable 4.5 to 6.0 0.9v dd v dd watchdog timer vih(7) ?port 8 output disable 4.5 to 6.0 0.75v dd v dd ?ports 74, 75 using as port input low vil(1) port 0 at cmos output disable 4.5 to 6.0 v ss 0.2v dd voltage output option vil(2) port 0 at n-ch output disable 4.5 to 6.0 v ss 0.25v dd open drain output option. vil(3) ?ports 1, 3 output disable 4.5 to 6.0 v ss 0.25v dd ?ports 72, 73 vil(4) ?port 70 output disable 4.5 to 6.0 v ss 0.25v dd port input / interrupt ?port 71 ?res vil(5) port 70 output disable 4.5 to 6.0 v ss 0.8v dd watchdog timer -1.0 vil(6) ?port 8 output disable 4.5 to 6.0 v ss 0.25v dd ?ports 74, 75 using as port operation tcyc 4.5 to 6.0 0.98 400 m s cycle time
lc86p5420 no.6730-12/22 parameter symbol pins conditions ratings v dd [v] min. typ. max. unit oscillation fre- fmcf(1) cf1, cf2 ?6mhz (ceramic 4.5 to 6.0 5.88 6 6.12 mhz quency range resonator oscil- (note 1) lation) ? refer to figure 1 fmcf(2) cf1, cf2 ?3mhz (ceramic 4.5 to 6.0 2.94 3 3.06 resonator oscil- lation) ? refer to figure 1 fmrc rc oscillation 4.5 to 6.0 0.3 0.8 3.0 fsxtal xt1, xt2 ?32.768khz 4.5 to 6.0 32.768 khz (crystal oscillation) ? refer to figure 2 oscillation tmscf(1) cf1, cf2 ?6mhz (ceramic 4.5 to 6.0 0.05 0.50 ms stable time resonator oscil- period lation) (note 1) ? refer to figure 3 tmscf(2) cf1, cf2 ?3mhz (ceramic 4.5 to 6.0 0.10 1.00 resonator oscil- lation) ? refer to figure 3 tssxtal xt1, xt2 ?32.768khz 4.5 to 6.0 1.00 1.50 s (crystal oscillation) ? refer to figure 3 (note 1) the oscillation constant is shown on table 1 and table 2.
lc86p5420 no.6730-13/22 3. electrical characteristics at ta= -- 30 c to +70 c, v ss =0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit input high iih(1) ports 0, 3 of open ?output disable 4.5 to 6.0 5 m a current drein output ?v in =13.5v (including off-leak current of the output tr.) iih(2) ?port 0 without ?output disable 4.5 to 6.0 1 pull-up mos tr. ? pull-up mos tr. ?ports 1, 3 off. ? ports 70, 71, 72, 73 ?v in =v dd ?port 8 (including off-leak current of the output tr.) iih(3) res v in =v dd 4.5 to 6.0 1 iih(4) ports 74, 75 v in =v dd 4.5 to 6.0 1 at using as port input low iil(1) ?ports 1, 3, ?output disable 4.5 to 6.0 -1 current ?port 0 without ? pull-up mos tr . pull-up mos tr. off. ? ports 70, 71, 72, 73 ?v in =v ss ?port 8 (including off-leak current of the output tr.) iil(2) res v in =v ss 4.5 to 6.0 -1 iil(3) ports 74, 75 v in =v ss 4.5 to 6.0 -1 at using as port output high voh(1) ports 0, 1, 3 ioh=-1.0ma 4.5 to 6.0 v dd -1 v voltage of cmos output voh(2) ?ports 71, 72, 73 ioh=-0.1ma 4.5 to 6.0 v dd -0.5 ? ports 84, 85, 86, 87 output low vol(1) ports 0, 1, 3 iol=10ma 4.5 to 6.0 1.5 voltage vol(2) iol=1.6ma 4.5 to 6.0 0.4 vol(3) ?ports 71, 72, 73 iol=1.6ma 4.5 to 6.0 0.4 ? ports 84, 85, 86, 87 vol(4) port 70 iol=1.0ma 4.5 to 6.0 0.4 pull-up mos rpu ?ports 0, 1, 3 voh=0.9 v dd 4.5 to 6.0 15 40 70 k w tr. resistor ? ports 70, 71, 72, 73 ? ports 84, 85, 86, 87 hysteresis vhis ?port 1 output disable 4.5 to 6.0 0.1v dd v voltage ? ports 70, 71, 72, 73 ?res pin cp all pins ?f=1mhz 4.5 to 6.0 10 pf capacitance unmeasurement terminals for input are set to v ss level. ?ta=25 c
lc86p5420 no.6730-14/22 4. serial input / output characteristics at ta=-30 c to +70 c, v ss = 0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit cycle tckcy(1) sck0, sck1 refer to figure 5 4.5 to 6.0 2 tcyc low tckl(1) 4.5 to 6.0 1 level width high tckh(1) 4.5 to 6.0 1 level pulse width cycle tckcy(2) sck0, sck1 ?use pull-up 4.5 to 6.0 2 resistor (1k w ) when open drain low tckl(2) output. 4.5 to 6.0 1 / 2 tckcy level ? refer to figure 5 pulse width high tckh(2) 4.5 to 6.0 1 / 2 tckcy level pulse width data set-up tick ?si0, si1 ?data set-up to 4.5 to 6.0 0.1 m s time ?sb0, sb1 sck0, 1 data hold tcki ?data hold from 4.5 to 6.0 0.1 time sck0, 1 ? refer to figure 5 output delay tcko(1) ?so0, so1 ?use pull-up 4.5 to 6.0 7 / 12 tcyc time ?sb0, sb1 resistor (1k w ) +0.2 (serial clock when open drain is extrnal output. clock) output delay tcko(2) ?data hold from 4.5 to 6.0 1 / 3 tcyc time sck0, 1 +0.2 (serial clock ? refer to figure 5 is internal clock) serial clock serial input serial output input clock output clock
lc86p5420 no.6730-15/22 5. pulse input conditions at ta=-30 c to +70 c , v ss = 0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit high / low tpih(1) ?int0, int1 ? interrupt accept- 4.5 to 6.0 1 tcyc level pulse tpil(1) ?int2 / t0in able width ? timer0-countable tpih(2) int3 / t0in ? interrupt accept- 4.5 to 6.0 2 tpil(2) (the noise able rejection clock ? timer0-countable select to 1 / 1.) tpih(3) int3 / t0in ? interrupt accept- 4.5 to 6.0 32 tpil(3) (the noise able rejection clock ? timer0-countable select to 1 / 16.) tpih(4) int3 / t0in ? interrupt accept- 4.5 to 6.0 128 tpil(4) (the noise able rejection clock ? timer0-countable select to 1 / 64.) tpil(5) res reset acceptable 4.5 to 6.0 200 m s 6. a / d converter characteristics at ta=-30 c to +70 c , vss = 0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit resolution n 4.5 to 6.0 8 bit absolute et 4.5 to 6.0 1.5 lsb precision (note 2) conversion tcad ad conversion 4.5 to 6.0 15.68 65.28 m s time time=16 5 tcyc (tcyc = (tcyc = (adcr2=0) 0.98 m s) 4.08 m s) (note 3) ad conversion 31.36 130.56 time=32 5 tcyc (tcyc = (tcyc = (adcr2=1) 0.98 m s) 4.08 m s) (note 3) analog input vain an0 to an7 4.5 to 6.0 v ss v dd v voltage range analog port iainh vain=v dd 4.5 to 6.0 1 m a input current iainl vain=v ss 4.5 to 6.0 -1 (note 2) absolute precision excepts quantizing error ( 1 / 2 lsb). (note 3) the conversion time means the time from executing the ad conversion instruction to setting the complete digital conversion value to the register.
lc86p5420 no.6730-16/22 7. current dissipation characteristics at ta=-30 c to +70 c, v ss = 0v parameter symbol pins conditions ratings v dd [v] min. typ. max. unit current iddop(1) v dd ?fmcf=6mhz 4.5 to 6.0 14 26 ma dissipation ceramic resona- during basic tor oscillation operation ? fsxtal=32.768khz (note 4) crystal oscillation ?system clock : cf oscillation ?internal rc oscillation stops. ?1 / 1 divider iddop(2) ?fmcf=3mhz 4.5 to 6.0 6.5 14 ceramic resona- tor oscillation ? fsxtal=32.768khz crystal oscillation ?system clock : cf oscillation ?internal rc oscillation stops. ?1 / 2 divider iddop(3) ?fmcf=0hz 4.5 to 6.0 4 12 (when oscillation stops). ? fsxtal=32.768khz crystal oscillation ?system clock : rc oscillation ?1 / 2 divider iddop(4) ?fmcf=0hz 4.5 to 6.0 3.5 9 (when oscillation stops). ? fsxtal=32.768khz crystal oscillation ?system clock : crystal oscillation ?internal rc oscillation stops. ?1 / 2 divider
lc86p5420 no.6730-17/22 parameter symbol pins conditions ratings v dd [v] min. typ. max. unit current iddhalt(1) v dd ?halt mode 4.5 to 6.0 4 9 ma dissipation ?fmcf=6mhz halt mode ceramic resona- (note 4) tor oscillation ? fsxtal=32.768khz crystal oscillation ?system clock : cf oscillation ?internal rc oscillation stops. ?1 / 1 devider iddhalt(2) ?halt mode 4.5 to 6.0 2.2 5 fmcf=3mhz ceramic resona- tor oscillation ?fsxtal=32.768khz crystal oscillation ?system clock : cf oscillation ?internal rc oscillation stops. ?1 / 2 devider iddhalt(3) ?halt mode 4.5 to 6.0 400 1600 m a fmcf=0hz (when oscillation stops). ?fsxtal=32.768khz crystal oscillation ?system clock : rc oscillation ?1 / 2 devider iddhalt(4) ?halt mode 4.5 to 6.0 25 100 fmcf=0hz (when oscillation stops). ? fsxtal=32.768khz crystal oscillation ?system clock : 32.768khz ?internal rc oscillation stops. ?1 / 2 devider current iddhold v dd hold mode 4.5 to 6.0 0.05 30 dissipation hold mode (note 4) (note 4) the currents of output transistors and pull-up mos transistors are ignored.
lc86p5420 no.6730-18/22 table 1. ceramic resonator oscillation guaranteed constant (main-clock) a kind of oscillation producer oscillator c1 c2 6mhz ceramic resonator murata csa 6.00mg 33pf 33pf oscillation cst 6.00mgw on chip kyocera kbr-6.0msa 33pf 33pf pbrc 6.00a (chip type) 33pf 33pf kbr-6.0mks on chip pbrc 6.00b (chip type) 3mhz ceramic resonator murata csa 3.00mg 33pf 33pf oscillation cst 3.00mgw on chip kyocera kbr-3.0ms 47pf 47pf * both c1 and c2 must use k rank ( 10%) and sl characteristics. table 2. crystal oscillation guaranteed constant (sub-clock) a kind of oscillation producer oscillator c3 c4 32.768khz crystal kyocera kf-38g-13p0200 18pf 18pf oscillation * both c3 and c4 must use j rank ( 5%) and ch characteristics. (it is about the application which is not in need of high precision. use k rank ( 10%) and sl characteristics.) notes ?since the circuit pattern affects the oscillation frequency, place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length. ?if you use other oscillators herein, we provide no guarantee for the characteristics. cf1 cf2 cf figure 1. main-clock circuit ceramic resonator oscillation c2 c1 figure 2. sub-clock circuit cryatal oscillation ilc00059 ilc00065 xt1 xt2 x'tal c4 c3
lc86p5420 no.6730-19/22 hold release signal operation mode power supply internal rc resonator oscillation cf1, cf2 xt1, xt2 operation mode internal rc resonator oscillation cf1, cf2 xt1, xt2 res v dd v dd limit 0v tms cf valid instruction execution mode hold tss xtal reset time tms cf reset ocr6=1 instruction execution mode unfixed tss xtal figure 3. oscillation stable time ilc00044
lc86p5420 no.6730-20/22 v dd (note) fix the value of r res, c res that is sure to reset untill 200 m s, after power supply has been over inferior limit of supply voltage. r res c res figure 4. reset circuit res ilc00052 figure 5. serial input / output test condition figure 6. pulse input timing condition v dd 0.5v dd tckcy sck0 sck1 si0 si1 so0, so1 sb0, sb1 tckl tckh tick tcki tcko tpil tpih 1k 50pf ilc00073 ilc00074
lc86p5420 no.6730-21/22 notice for use ? the construction of the one-time programmable microcomputer with a blank built-in prom makes it impossible for sanyo to completely factory-test it before shipping. to probe reliability of the pro- grammed devices, the screening procedure shown in the following figure should always be followed. ? it is not possible to perform a writing test on the blank prom. 100% yield, therefore, cannot be guaranteed. ? keeping the dry packing the environment must be held at a temparature of 30 c or less and a humidity level of 70% or less. ? after opening the packing after opening the packing, a controlled environment must be maintained until soldering. the environment must be held at a temperature of 30 c or less and a humidity level of 70% or less. please solder within 96 hours. a. shipping with a blank prom (programming the data by yourself) this microcomputer is provided dip / qfp packages, but the condition before mounting is different. refer to the mounting procedure as follows. b. shipping with a programmed prom (programming the data by sanyo) dip mounting qfp mounting recommended process of screening heat-soak reading ascertain of program +1 --0 150 5 c, 24 hr reading ascertain of program recommended process of screening heat-soak +1 --0 150 5 c, 24 hr qfp dip writing data for program / verifying mounting mounting writing data for program / verifying
lc86p5420 no.6730-22/22 specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co. , ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the "delivery specification" for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. this catalog provides information as of january, 2001. specifications and information herein are subject to change without notice. ps memo :

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